Rudrapatna Kallikote Shyamasundar did his BE (Electrical) from University of Mysore, and ME (Electrical) and PhD (Computer Science and Automation) (1975) degrees from Indian Institute of Science, Bangalore. He joined the National Centre for Software Development and Computing Techniques at the Tata Institute of Fundamental Research (TIFR) and then worked at Eindhoven Technological University (1978-79) as International Research Fellow to work under Edsgar Dijkstra. Thereafter, he started the Theoretical Computer Science Group at TIFR covering areas of concurrency, real-time programming, specification and verification of Software, etc. He was first Dean of the School of Technology and Computer Science at TIFR. He has held various assignments at IBM TJ Watson Research Center, Eindhoven University of Technology, State University of Utrecht, Pennsylvania State University, University of Illionois, University of California, ENSMP Sophia Antipolis, IRISA, Rennes and so on.

Academic and Research Achievements: Shyamasundar made outstanding contributions in the areas of real-time distributed systems, programming languages, logic programming, reactive systems and formal methods. His work on semantics of real-time distributed programs was the first that provided realistic parameterized models for real-time distributed models having Ada like rendezvous mechanisms. This work lead to the development of static analysis tools for timing analysis and also formed the basis of prestigious Esprit projects. Another pioneering work in the area of synchronous programming languages was the proposal of the paradigm of Communicating Reactive Processes (CRP). He also proposed a unified paradigm called Multiclock Esterel which subsumes CRP for specifying and designing synchronous and asynchronous hardware in a modular way. The model has been used to formally model a large subset of VHDL. He built a prototype programming environment (including graphical and textual editors, simulators and verifiers) for the design, specification, modeling and verification of real-time systems which is in use in a large scale R&D environment in India. Work on the design of combinators provides a uniform framework for the study of concurrent calculi. Work on exception handling, was the first attempt to provide a methodology for designing robust programs supporting concurrency, Ada rendezvous and exceptions. Exploitation of inherent parallelism of specifications without foregoing security in concurrent languages can be seen in the design of CDL*. He developed novel automatable approach for checking termination of Logic Programs leading to the development of methodologies/tools that could verify large Prolog programs such as compilers. He also contributed to the development of secure systems for e-commerce and cyber-security. He has more than 200 publications and several patents in US and India. Thirty students have done PhD under his guidance.

Other Contributions: Dr Shyamasundar served as Consultant to Esprit projects at The Netherlands and several industries in India. He worked to set up centres of excellence such as Centre for Formal Design and Verification of Systems (CFDVS) at IIT Bombay, Cyber Security Education centers and Discrete Mathematics and Theoretical Computer Science Distributed centers.

Awards and Honours: Shyamasundar was elected Fellow of the Indian Academy of Sciences, Bangalore; National Academy of Sciences (India), Allahabad; Indian National Academy of Engineering; and Institute of Electrical and Electronics Engineers (IEEE), USA, Fellow ACM, USA, Fellow TWAS, Trieste, SN Mitra Award for Excellence in Engineering Sciences from INAE 2014, Fellow IETE and Diamond Jubilee Medal